MEMORY DEVICE FOR SUPPORTING NEW COMMAND INPUT SCHEME AND METHOD OF OPERATING THE SAME

摘要

Described is a method of operating a memory device including row pins and column pins. The method includes receiving a first active command through the row pins during a first one and a half cycles of a clock signal, receiving a first read command or a first write command through the column pins during a first one cycle of the clock signal, receiving a first pre-charge command through the row pins during a first half cycle of the clock signal corresponding to a rising edge of the clock signal, receiving a second active command through the row pins during a second one and a half cycles of the clock signal, receiving a second read command or a second write command through the column pins during a second one cycle of the clock signal, and receiving a second pre-charge command through the row pins during a second half cycle of the clock signal corresponding to a falling edge of the clock signal.