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Improved Process for Programming Field Programmable Gate Arrays Using Partial Reconstruction
Improved Process for Programming Field Programmable Gate Arrays Using Partial Reconstruction
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机译:使用部分重建的编程现场可编程门阵列的改进过程
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摘要
Programming Field Programmable Gate Array (FPGA) Digital Electronic Integrated Circuits (ICs) and other ICs that Support Partial Reconfiguration - Certain FPGAs have reconfigurable partitions and configurable primitive variants in each of the reconfigurable partitions - Compile and store the primitive bitstreams for different primitive functions that may be implemented on a specific FPGA, before writing the configuration bitstreams to the FPGA; receiving input at the graphical user interface to connect graphical blocks representing the functional logic of an algorithm to be implemented on a particular FPGA, the graphical blocks relating to reconfigurable logic; automatically determining a subset of primitive functions that include specific primitive functions corresponding to graphics blocks; obtaining, from the digital storage, a subset of primitive bitstreams corresponding to the subset of primitive functions; It involves writing a subset of the primitive bitstreams to a particular FPGA using partial reconstruction operations.
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