首页> 外国专利> LINEAR CALIBRATION SYSTEM AND METHOD FOR TIME-TO-DIGITAL CONVERTER AND DIGITAL PHASE-LOCKED LOOP

LINEAR CALIBRATION SYSTEM AND METHOD FOR TIME-TO-DIGITAL CONVERTER AND DIGITAL PHASE-LOCKED LOOP

机译:用于时间到数字转换器和数字锁相环的线性校准系统和方法

摘要

The present disclosure provides a linear calibration system for a time-to-digital converter and a method thereof, and a digital phase-locked loop. The linear calibration system includes a digitally controlled reference delay circuit for receiving a first clock signal and delaying the first clock signal to generate a reference clock signal, a time-to-digital conversion circuit including at least two time-to-digital converters, and a state machine. The time-to-digital conversion circuit receives the first clock signal and the reference clock signal, delays the first clock signal to generate a first delay signal, compares a phase of the first delay signal with a phase of the reference clock signal, and outputs a phase detection result signal. The state machine generates a delay control signal for controlling the digitally controlled reference delay circuit, adjusts a calibration control signal to align the phases of the first delay signal and the reference clock signal.
机译:本公开提供了一种用于时间到数字转换器的线性校准系统和其方法,以及数字锁相环。线性校准系统包括数字控制的参考延迟电路,用于接收第一时钟信号并延迟第一时钟信号以产生参考时钟信号,包括至少两个时间转换器的时间转换电路,以及一个国家机器。时间转换电路接收第一时钟信号和参考时钟信号,延迟第一时钟信号以产生第一延迟信号,将第一延迟信号的相位与参考时钟信号的相位进行比较,并输出相位检测结果信号。状态机产生用于控制数字控制的参考延迟电路的延迟控制信号,调整校准控制信号以对准第一延迟信号和参考时钟信号的相位。

著录项

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号