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Three-dimensional memory device having on-pitch drain select gate electrodes and method of manufacturing the same
Three-dimensional memory device having on-pitch drain select gate electrodes and method of manufacturing the same
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机译:具有上间距漏极选择栅电极的三维存储器件和制造方法
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摘要
An array of memory stack structures extends through an alternating stack of insulating and electrically conductive layers over the substrate. An array of drain select level assemblies comprising cylindrical electrode portions is formed over the alternating stack having the same periodicity as the array of memory stack structures. A drain select level isolation strip comprising dielectric materials may be formed between adjacent pairs of drain select level assemblies using the drain select level assemblies as a self-aligning template. Alternatively, cylindrical electrode portions may be formed around an upper portion of each memory stack structure. Strip electrode portions are formed on the cylindrical electrode portions after formation of the drain select level isolation strip.
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