首页> 外国专利> Interconnect structures, packaged semiconductor devices, and methods of packaging semiconductor devices

Interconnect structures, packaged semiconductor devices, and methods of packaging semiconductor devices

机译:互连结构,封装的半导体器件和包装半导体器件的方法

摘要

Interconnect structures, packaged semiconductor devices, and methods of packaging semiconductor devices are disclosed. In some embodiments, an interconnect structure includes dielectric layers, a conductive layer disposed in the dielectric layers, and a via layer disposed in the dielectric layers proximate the conductive layer. An underball metallization (UBM) layer is disposed in the dielectric layers proximate the via layer. A first connector coupling region is disposed in the via layer and the UBM layer. A via layer portion of the first connector coupling region is coupled to a first contact pad in the conductive layer. A second connector coupling region is disposed in the UBM layer. The second connector coupling region is coupled to a conductive segment in the UBM layer and the via layer. The second connector coupling region is coupled to a second contact pad in the conductive layer by the conductive segment.
机译:公开了互连结构,封装的半导体器件和包装半导体器件的方法。在一些实施例中,互连结构包括介电层,设置在介电层中的导电层,并且设置在靠近导电层的介电层中的通孔层。欠球金属化(UBM)层设置在靠近通孔层的介电层中。第一连接器耦合区域设置在通孔层和UBM层中。第一连接器耦合区域的通孔层部分耦合到导电层中的第一接触垫。第二连接器耦合区域设置在UBM层中。第二连接器耦合区域耦合到UBM层和通孔层中的导电段。第二连接器耦合区域通过导电段连接到导电层中的第二接触垫。

著录项

  • 公开/公告号US11031363B2

    专利类型

  • 公开/公告日2021-06-08

    原文格式PDF

  • 申请/专利权人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.;

    申请/专利号US201916577645

  • 发明设计人 HSIEN-WEI CHEN;

    申请日2019-09-20

  • 分类号H01L23;H01L25/10;H01L23/31;G06F30/39;H01L25/065;

  • 国家 US

  • 入库时间 2022-08-24 19:05:11

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号