METHODS OF FORMING METAL SILICIDE LAYERS AND METAL SILICIDE LAYERS FORMED THEREFROM

摘要

Methods for forming low resistivity metal silicide interconnects using one or a combination of a physical vapor deposition (PVD) process and an annealing process are described herein. In one embodiment, a method of forming a plurality of wire interconnects includes flowing sputtering gas into a processing volume of a processing chamber, applying power to a target disposed in the processing volume, and plasma in an area proximate the sputtering surface of the target. Forming, and depositing a metal and silicon layer on the surface of the substrate. Herein, the first target comprises a metal-silicon alloy, and the sputtering surface of the target is inclined from about 10° to about 50° with respect to the surface of the substrate.