TWO-STAGE SIGNALING FOR VOLTAGE DRIVER COORDINATION IN INTEGRATED CIRCUIT MEMORY DEVICES

摘要

An integrated circuit memory device comprising: memory cells; A circuit patch constructed on the integrated circuit die; A plurality of adjacent patches configured on the integrated circuit die; First connections from the circuit patch to adjacent patches, respectively; A plurality of peripheral patches configured on the integrated circuit die; And second connections from adjacent patches to peripheral patches. When determining whether to apply an offset voltage to be driven by adjacent patches and peripheral patches on unselected memory cells, to at least partially offset an increase in voltage applied by the circuit patch on one or more selected memory cells, a circuit patch Is in communication with adjacent patches through first connections, and with peripheral patches through first connections, adjacent patches and second connections.