Scalable boolean methods in a modern synthesis flow

摘要

Techniques and systems for optimizing a logic network are described. Some embodiments automatically identify scenarios where Boolean methods are best driven by truth tables, binary decision diagrams (BDDs) or satisfiability (SAT). Some embodiments use circuit partitioning techniques that are based on hash-tables and topological sorting, and that are capable of grouping nodes with high simplification likelihood and still are able to efficiently scale to large circuits. Some embodiments feature a generalized resubstitution framework based on computing, and implementing, the Boolean difference between two nodes. Some embodiments include enhancements to (i) gradient-based and-inverter-graph (AIG) optimization, (ii) heterogeneous elimination for kerneling, and (iii) revisitation of maximum set of permissible functions (MSPF) computation with BDDs.