Process temperature measurement device manufacturing technology and its calibration and data interpolation method

摘要

A process condition measurement wafer assembly is disclosed. In embodiments, the process condition measurement wafer assembly includes a lower substrate and an upper substrate. In another embodiment, a process condition measurement wafer assembly includes one or more electronic components disposed on one or more printed circuit elements and interposed between an upper substrate and a lower substrate. In another embodiment, the process condition measurement wafer assembly includes one or more shielding layers formed between the lower substrate and the upper substrate. In embodiments, the one or more shielding layers are configured to electromagnetically shield the one or more electronic components and spread the voltage potential across the lower and upper substrates.