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A semiconductor wafer alignment marking method and a semiconductor package having alignment marking portions
A semiconductor wafer alignment marking method and a semiconductor package having alignment marking portions
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机译:半导体晶片对准标记方法和具有对准标记部分的半导体封装
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摘要
Some embodiments include a semiconductor package. The semiconductor package has a semiconductor die having a main region containing an integrated circuit and an edge region containing a portion of an alignment mark location. This portion of the alignment mark position comprises a segment of the alignment mark. The alignment mark includes a pattern of lines and spaces, the lines extending along a first direction. The portion of the alignment mark position also includes a texture having a pattern other than lines extending along either a first direction or a second direction substantially orthogonal to the first direction. Some embodiments include methods for alignment marking of semiconductor wafers.
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