Memory controller improving data reliability, Memory system having the same and Operating method of Memory controller

摘要

Disclosed are a memory controller with improved data reliability, a memory system including the same, and a method of operating the memory controller. A memory controller according to an aspect of the technical idea of the present disclosure includes a first parity and a second error detection operation used for a first error detection operation on the read data together with data read from a first row of a memory device. A defect determination circuit configured to receive a second parity used for and determine whether the first row is defective based on a result of the first error detection operation and the second error detection operation, and the first row and at least one For a recovery unit including second rows, a parity storage circuit for storing a recovery parity for recovering a defect in a row unit, and when it is determined that the first row is a defective row, at least one second of the recovery unit And a recovery circuit for recovering a defect of the first row by using data of a row and the recovery parity.