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Fabrication of monocriptalline silicon on insulating substrates utilizing selective etching and deposition techniques
Fabrication of monocriptalline silicon on insulating substrates utilizing selective etching and deposition techniques
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机译:利用选择性蚀刻和沉积技术在绝缘基板上制备单cricritalline硅
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摘要
The methods result in starting material on substrates in which dielectrically isolated integrated circuits, each including a plurality of active devices having substantial gains at high frequencies and small geometries, can be manufactured. One method utilizes a silicon wafer having a [100] crystallographic orientation, on which a P+ layer is formed. This P+ layer has an exposed high concentration surface and a relatively low concentration surface interfacing the wafer. A first insulating material is then formed on the high concentration surface and a first supporting material is formed on the insulating material. The P+ layer provides an etch retardant for an anisotropic etch which removes much of the wafer to expose a substantially planar P+ surface of relatively low concentration on which a thin layer of high quality monocrystalline silicon is epitaxially formed. If a P+ buried layer is not desired, then the process is continued by providing a second insulating layer on the epitaxial silicon with a second supporting material thereon. Next, the first supporting material, first insulating layer and the P+ layer are removed to provide starting material which does not have a P+ buried layer therein.
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机译:该方法导致在基板上的原材料,其中可以制造介电隔离的集成电路,每个绝缘隔离的集成电路包括在高频和小几何形状下具有实质性增益的多个有源器件。一种方法利用具有[100]晶体学取向的硅晶片,在其上形成P +层。该P +层具有暴露的高浓度表面和与晶片相接的较低浓度的表面。然后在高浓度表面上形成第一绝缘材料,并且在绝缘材料上形成第一支撑材料。 P +层为各向异性刻蚀提供了一种刻蚀剂,该刻蚀剂去除了许多晶片,从而暴露出浓度相对较低的基本为平面的P +表面,在其上外延形成了高质量的单晶硅薄层。如果不需要P +掩埋层,则通过在外延硅上提供第二绝缘层并在其上具有第二支撑材料来继续该过程。接下来,去除第一支撑材料,第一绝缘层和P +层,以提供其中不具有P +掩埋层的起始材料。
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