首页> 外国专利> Digital logic circuit for signal shaping - has linear rise and fall signal edge defined by Miller integrator circuit

Digital logic circuit for signal shaping - has linear rise and fall signal edge defined by Miller integrator circuit

机译:用于信号整形的数字逻辑电路-具有米勒积分器电路定义的线性上升和下降信号沿

摘要

A digital logic circuit operates as a Miller integrator stage to generate outputs with defined linear rise and fall edges of predetermined duration. An input stage (E/Te) allows combination of inputs in either AND or OR functions. The output stage (T1, T2) constructed as a Miller integrator is coupled over a limiting stage (Z1, T2) to maintain a constant voltage change. The input stage together with the limiting stage operates as a differencing amplifier. A final stage (Ta1, Ta2, Ta3) operates as a current limiting stage.
机译:数字逻辑电路用作Miller积分器级,以产生具有预定持续时间的定义线性上升沿和下降沿的输出。输入级(E / Te)允许在AND或OR功能中组合输入。构造为米勒积分器的输出级(T1,T2)在限制级(Z1,T2)上耦合,以保持恒定的电压变化。输入级与限幅级一起用作差分放大器。最后阶段(Ta1,Ta2,Ta3)作为电流限制阶段。

著录项

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号