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Semiconductor varactor with high capacitance per unit area - has high barrier layer capacitance achieved by means of high doping

机译:每单位面积具有高电容的半导体变容二极管-通过高掺杂获得高阻挡层电容

摘要

The metal-oxide-silicon semiconductor varactor device has a higher capacitance/unit area, through doping the semiconductor substrate in the region of the varactor, than in the remaining area. The second electrode (SE2) of a transistor (AT) is formed into the same substrate as the varactor. An inversion layer (V) is formed in the surface of the substrate when a potential is applied to the insulated metallisation (LB). The varactor capacitance is a combination of the electrode/inversion layer capacitance and the inversion layer/substrate capacitance (barrier layer capacitance). By increasing the doping of the substrate area below the varactor electrode (SE3), thus reducing the depth of the space-charge zone (RZ), the barrier layer capacitance is increased and with it the total varactor capacitance.
机译:通过在变容二极管的区域中掺杂半导体衬底,金属氧化物-硅半导体变容二极管器件具有比其余区域更高的电容/单位面积。晶体管(AT)的第二电极(SE2)形成为与变容二极管相同的基板。当向绝缘金属化层(LB)施加电位时,在衬底表面上形成反型层(V)。变容电容是电极/反型层电容和反型层/衬底电容(阻挡层电容)的组合。通过增加变容电极(SE3)下方衬底面积的掺杂,从而减小空间电荷区(RZ)的深度,势垒层电容增加,并且总变容电容增加。

著录项

  • 公开/公告号DE2622623A1

    专利类型

  • 公开/公告日1977-12-01

    原文格式PDF

  • 申请/专利权人 SIEMENS AG;

    申请/专利号DE19762622623

  • 申请日1976-05-20

  • 分类号H01L29/94;

  • 国家 DE

  • 入库时间 2022-08-22 22:02:27

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