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Threshold logic circuit for statistical analysis - has binary input coder and comparator whose output depends on number of inputs and set threshold

机译:用于统计分析的阈值逻辑电路-具有二进制输入编码器和比较器,其输出取决于输入数量和设置的阈值

摘要

The binary threshold logic circuit, for statistical analysis etc., has a variable threshold and offers the choice of producing an output either when the number of input signals is equal to the set threshold, when greater than it, or when equal to or greater than it. The various input signals (E) are converted by a binary coder (BC) and passed to a comparator (VGS2). The comparator also receives the binary output signals (A) according to the above relationship between number of input signals and the set threshold. These outputs may be at different output terminals or at a single output under the control of a chargeover decoder.
机译:用于统计分析等的二进制阈值逻辑电路具有可变阈值,并且可以选择在输入信号的数量等于设置的阈值,大于等于设置的阈值或大于等于等于设置的阈值时产生输出它。各种输入信号(E)由二进制编码器(BC)转换并传递到比较器(VGS2)。比较器还根据输入信号数与设置阈值之间的上述关系接收二进制输出信号(A)。这些输出可以在充电解码器的控制下位于不同的输出端子或单个输出。

著录项

  • 公开/公告号DE2634296A1

    专利类型

  • 公开/公告日1978-02-02

    原文格式PDF

  • 申请/专利权人 SIEMENS AG;

    申请/专利号DE19762634296

  • 发明设计人 KOCHELHEINZING.;

    申请日1976-07-30

  • 分类号H03K19/42;H03K17/30;G06F5/00;H03K19/26;

  • 国家 DE

  • 入库时间 2022-08-22 22:01:24

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