首页> 外国专利> CONTROL SYSTEM FOR COMMON BUS OCCUPANCY IN MULTII PROCESSOR SYSTEM

CONTROL SYSTEM FOR COMMON BUS OCCUPANCY IN MULTII PROCESSOR SYSTEM

机译:多处理器系统中常见总线占用率的控制系统

摘要

PURPOSE:To make it possible to perform bus occupancy control in the shortest time by using information on the port number of a bus port connected to a common bus at that time for bus occupancy control of each bus port by a bus supervisory control circuit. CONSTITUTION:Bus supervisory control circuit 1 sets the port number to zero and then make a decision on whether the number is registered in the memory of bus port 2 connected to common bus 1. When the decision is ''NO'', an advance is made without sending a polling command to bus port 2 of the number and the decision is made again. When ''YES'', the polling command is sent to bus port 2 of the port number and if a bus occupancy discrimination signal is sent back, it is considered that the right of bus occupation has been transferred. In case of time out, the port number is advanced to a decision on whether a connection port discrimination table has registration or not. Those operations are repeated in succession.
机译:目的:通过使用与当时连接到公共总线的总线端口的端口号有关的信息,在最短时间内执行总线占用控制,以通过总线监控电路对每个总线端口进行总线占用控制。构成:总线监视控制电路1将端口号设置为零,然后确定是否在连接到公共总线1的总线端口2的内存中注册了该端口号。当判定为“否”时,前进无需向该编号的总线端口2发送轮询命令而做出决定,并再次做出决定。当“是”时,轮询命令被发送到端口号的总线端口2,并且如果回送了总线占用鉴别信号,则认为已经转移了总线占用权。在超时的情况下,将端口号提前到关于连接端口判别表是否已注册的决定。这些操作相继重复。

著录项

  • 公开/公告号JPS5556218A

    专利类型

  • 公开/公告日1980-04-24

    原文格式PDF

  • 申请/专利权人 HITACHI LTD;

    申请/专利号JP19780128515

  • 申请日1978-10-20

  • 分类号G06F11/30;G06F3/00;G06F13/36;G06F13/366;G06F15/16;G06F15/177;

  • 国家 JP

  • 入库时间 2022-08-22 18:53:23

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