The mounting for the representation in italics of characters on screens of devices for displaying data

摘要

In the representation of a normal character, a delay circuit delays the activation signals (V) allocated to the individual dots of the dot matrix by a constant basic time. When an italics control signal (K) is present, the delay circuit delays the activation signals by a specific line delay time which increases from line to line by a constant amount. The increase in the line delay time amounts to a fraction of the duration of an activation signal (V) which generates a pixel. The delay circuit comprises at least two chains of binary dividers (F1/1 to F15/1 or F1/3 to F15/3) which are controlled consecutively and alternately by inversely related clocks (G1, G2). The output signals of reciprocally corresponding binary dividers of the two chains are combined via AND gates (UG2 to UG16). IMAGE