首页>
外国专利>
Method and circuit for discharging bit lines capacitances in an integrated semi-conductor memory, especially for the MTL technique
Method and circuit for discharging bit lines capacitances in an integrated semi-conductor memory, especially for the MTL technique
展开▼
机译:用于集成半导体存储器中的位线电容放电的方法和电路,特别是用于MTL技术的方法和电路
展开▼
页面导航
摘要
著录项
相似文献
摘要
A method and arrangement is provided for selecting and discharging a pair of bit lines of a plurality of charged pairs of bit lines of a memory circuit having cells of the merged transistor logic type. A selected pair of bit lines is discharged through a selected cell coupled to the selected pair of bit lines while simultaneously the remaining or non-selected pairs of bit lines are discharged through a common switch into non-selected word lines.
展开▼