首页> 外国专利> Integrated semiconductor Darlington pair construction - has input zero gain transistor and has transistor bases connected to surface layers by heavily doped zones

Integrated semiconductor Darlington pair construction - has input zero gain transistor and has transistor bases connected to surface layers by heavily doped zones

机译:集成半导体达林顿对结构-具有输入零增益晶体管,并且晶体管基极通过重掺杂区连接到表面层

摘要

A Darlington pair amplifier (100) consists of two transistors in a monolithic planar structure. Switching speed is increased by use of a zero gain input transistor without increasing the size or complexity of the amplifier. The areas of the epitaxial layer which make up the transistor bases are connected to the surface layers by heavily doped zones, the doping type being the same as that of the bases. The emitter layers, also heavily doped (up to 1018 atoms/cm3), extend in the superficial layer. The depth, doping and profile of the doping are almost identical to that of a power transistor. The connection layer to the surface conductors is taken between the areas occupied by the transistors.
机译:达林顿对放大器(100)由单片平面结构中的两个晶体管组成。通过使用零增益输入晶体管可提高开关速度,而不会增加放大器的尺寸或复杂性。构成晶体管基极的外延层的区域通过重掺杂区连接到表面层,掺杂类型与基极的掺杂类型相同。同样重掺杂的发射极层(高达1018原子/ cm3)在表层中延伸。掺杂的深度,掺杂和分布与功率晶体管几乎相同。到表面导体的连接层位于晶体管占据的区域之间。

著录项

  • 公开/公告号FR2377706B1

    专利类型

  • 公开/公告日1981-05-29

    原文格式PDF

  • 申请/专利权人 RADIOTECHNIQUE COMPELEC;

    申请/专利号FR19770000739

  • 发明设计人

    申请日1977-01-12

  • 分类号H01L27/06;H03F3/213;

  • 国家 FR

  • 入库时间 2022-08-22 15:06:41

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