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METHOD OF REDUCING EFFECT DUE TO QUANTIZATION ERROR OF DIGITAL PROCESSING LOCATOR

机译:一种减少数字处理定位器量化误差影响的方法

摘要

PURPOSE:To reduce the effect due to the quantization error in a low input area, etc., by obtaining a resistance component and inductance component through using three consecutive data near the peak values of voltage and electric current. CONSTITUTION:It is assumed that when an input terminal 10 receives data in corresponding to the n-th sampling No., the output of a storage circuit 1 contains in-1. In the subtraction circuit 2, subtraction of (in-in-1) is calculated, and its output is judged as positive, negative or zero by a comparator circuit 4. In a comparator circuit 5, calculation is performed on the data advanced by one sampling from the output of the comparator circuit 4, by using the output of a multiplication circuit 3 and that of the storage circuit 1, and the results of positive, negative and zero are outputted. Next, when a decision circuit 6 receives output having the identical sign from the comparator circuits 4 and 5, it is possible to determine the presence of the peak point between said two outputs and the point of time for the presence of the peak point. Therefore, said method can reduce the effects due to the quantization error in the low input area, etc.
机译:目的:通过在电压和电流的峰值附近使用三个连续数据获得电阻分量和电感分量,以减少低输入区域等中的量化误差所造成的影响。组成:假定当输入端子10接收到与第n个采样号相对应的数据时,存储电路1的输出包含in-1。在减法电路2中,计算(in-in-1)的减法,并由比较器电路4将其输出判断为正,负或零。在比较器电路5中,对加1的数据进行计算。通过使用乘法电路3的输出和存储电路1的输出,从比较器电路4的输出进行采样,输出正,负和零的结果。接下来,当判定电路6从比较器电路4和5接收具有相同符号的输出时,可以确定所述两个输出之间的峰值点的存在以及该峰值点的存在的时间点。因此,所述方法可以减小由于低输入区域等中的量化误差引起的影响。

著录项

  • 公开/公告号JPS5714755A

    专利类型

  • 公开/公告日1982-01-26

    原文格式PDF

  • 申请/专利权人 MITSUBISHI ELECTRIC CORP;

    申请/专利号JP19800090106

  • 发明设计人 MAEDA KOUJI;

    申请日1980-06-30

  • 分类号G01R19/04;G01R31/08;H02H3/02;

  • 国家 JP

  • 入库时间 2022-08-22 14:36:49

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