The circuit has two alternately operated electronic switches and two capacitors. Both capacitors are charged via the first switch. The second capacitor has a much smaller capacitance than the first and is discharged via the second switch. The first capacitor (C1) is located in the series path (1) of a 4-pole circuit whose cross path (2) contains the first switch (T1) in series with the parallel combination of the second switch (T2) and the second capacitor (C2). The switches are FETs. A compensating FET (T3) is located in the series path of the 4-pole circuit and the sum of its gate/source and gate/drain capacitances is equal to the gate/drain capacitances of the first FET switch.
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