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Conductor pattern for semiconductor device on insulating substrate - where multilayer pattern includes palladium covered by palladium oxide and then gold
Conductor pattern for semiconductor device on insulating substrate - where multilayer pattern includes palladium covered by palladium oxide and then gold
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机译:绝缘基板上半导体器件的导体图案-多层图案包括先被氧化钯覆盖的钯,再被金覆盖
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摘要
The substrate is made esp. of alumina or glass, which is covered with a multilayer conductor pattern. The pattern consists of a first layer (a) of CrNi, which is covered by Ti (b) and then Pd(c). On top of the Pd(c) is a layer (d) of PdO, and then a layer (e) of gold. The gold layer (e) is pref. more than 1000 nm thick, esp. 2000 nm thick with a Pd layer (c) of ca. 400 nm. Alternatively, the Au (e) may be less than 500 nm thick, esp. 50-120 nm thick. The CrNi(a) pref. has a resistance of e.g. 100 ohms/square, whereas the Ti(b) is pref. 50 nm thick. Used esp. for highly integrated coding/decoding semiconductor circuits in a long-distance digital telephone exchange. The conductor patterns are used to make joints by soldering, or bonding. A layer of PdO can form on the Pd(c) before the Au is deposited, but is not detrimental to the pattern; and in many cases a very thin layer (e) of gold may be used so cost is reduced.
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