首页>
外国专利>
Fabrication method for integrated circuit structures including field effect transistors of sub-micrometer gate length, and integrated circuit structure fabricated by this method
Fabrication method for integrated circuit structures including field effect transistors of sub-micrometer gate length, and integrated circuit structure fabricated by this method
展开▼
机译:包括亚微米栅极长度的场效应晶体管的集成电路结构的制造方法,以及通过该方法制造的集成电路结构
展开▼
页面导航
摘要
著录项
相似文献
摘要
For forming field effect transistors, a multilayer structure (16, 20, 21, 22, 24, 26) of different materials including a conductive layer (20) is deposited over a substrate (10). Vertical sidewalls are obtained by etching the top layers (24, 26) and a sidewall layer (30) is formed by oxidizing the sidewalls. Removing further material leaves the very fine structure of sidewall layers, which is used as a mask to etch the lower layers (22, 21, 20) so as to leave portions of the conductive layer as very fine gate electrodes, plus interconnections. Some gate electrodes of larger dimension are obtained simultaneously by covering the area between two stripes of the sidewall layer before etching down to the conductive layer.
展开▼