The display system employs bits maps (MAP0 to MAP3) storing data for display in pattern corresponding to picture-element (pel) which is read sequentially, the graphic controllers (5,6) retrieving data from each of the bit map memories in parallel groups of n-bits, the compare facilities (20,21) comparing the retrieved data with an n-bit compare data group to detect equality between each bit of the compare group and corresponding bits of the retrieved data groups, and the comparing circuits (26 to 29) arranged to compare each bit of each parallel n-bit group from the pair of maps with an associated one of a pair of the n-bits of the compare data.
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