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A method for producing an electrical matrix funktionsfaehiger circuits and matrix - arrangement of funktionsfaehigen electrical circuits

机译:用于产生电矩阵函数电路的方法和函数电路的矩阵布置

摘要

Wafer level integration is provided by using individually integrated circuits on a wafer substrate and generating an electrically ordered matrix of functional integrated circuits assigned from a random distribution of functional, partially functional, and non-functional circuits. Each circuit is individually tested for functionality and thereafter a conductive grid is formed on said wafer to interconnect all of the circuits on the wafer. Circuits that are tested as being non- functional are isolated prior to formation of the interconnecting grid by eliminating fuses that provide connections between the defective circuit and the conductive grid. Each matrix row includes redundant decoder lines. The redundant decoder lines are programmed to reassign functional circuits from a semiconductor wafer substrate location to a matrix row location in another matrix row having defective circuits. In this way, complete functional matrix rows are formed. Associated input and output lines are assigned in a similar manner to a correct bit position within an input and output byte.
机译:通过在晶片衬底上使用单独的集成电路并生成从功能,部分功能和非功能电路的随机分布分配的功能集成电路的电有序矩阵,可以提供晶圆级集成。分别测试每个电路的功能,然后在所述晶片上形成导电网格以互连晶片上的所有电路。通过消除在故障电路和导电栅网之间提供连接的保险丝,可以在形成互连栅网之前隔离被测试为无法工作的电路。每个矩阵行包括冗余解码器线。冗余解码器线被编程为将功能电路从半导体晶片衬底位置重新分配给具有缺陷电路的另一矩阵行中的矩阵行位置。这样,形成完整的功能矩阵行。关联的输入和输出线以类似的方式分配给输入和输出字节内的正确位位置。

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