首页> 外国专利> Integrated circuit for writing, reading and erasing memory matrices with insulated-gate field-effect transistors having non-volatile storage behaviour

Integrated circuit for writing, reading and erasing memory matrices with insulated-gate field-effect transistors having non-volatile storage behaviour

机译:用具有非易失性存储特性的绝缘栅场效应晶体管写入,读取和擦除存储矩阵的集成电路

摘要

A memory access and control circuit is described for use with a non- volatile memory matrix utilizing insulated gate field effect transistors. Two one out of n selector circuits which are complementary in operation and which are formed from transistors of opposite conductivity type are formed on an integrated circuit and transistors of one conductivity type are formed in insulating islands in the substrate.
机译:描述了一种用于与利用绝缘栅场效应晶体管的非易失性存储矩阵一起使用的存储器访问和控制电路。在集成电路上形成n个选择器电路中的两个,它们在操作上是互补的,并且由相反导电类型的晶体管形成,并且在基板中的绝缘岛中形成一种导电类型的晶体管。

著录项

  • 公开/公告号US4493058A

    专利类型

  • 公开/公告日1985-01-08

    原文格式PDF

  • 申请/专利权人 ITT INDUSTRIES INC.;

    申请/专利号US19820359536

  • 发明设计人 FRITZ G. ADAM;

    申请日1982-03-18

  • 分类号G11C11/40;

  • 国家 US

  • 入库时间 2022-08-22 07:53:19

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