MULTI PROCESSOR SYSTEM USING CONTROL SYSTEM VECTOR CALCULATION REGISTER

摘要

PURPOSE:To shorten a load time and make possible a high speed calculation by controlling not so as to load a task to a vector arithmetic register when the task operating on a scientific arithmetic processor indicates an initial state. CONSTITUTION:A multi processor system comprises a main memory device 1 for storing control informations including the control block of a task operating on a processor, a program or the data, a scientific arithmetic processor 2 comprised of a control processor 3 and an arithmetic processor 4, an input and output processor 5 and an input and output device 6. The processor 4 comprises a vector arithmetic section 41, a control section 42 and a scalar arithmetic section 43. In the control block of the task stored in the device 1, a control bit is set to 1 when the task is situated in an initial state, and this control bit is discriminated and a load to a vector register 413 and a vector mask register 411 is controlled not so as to be performed. In this manner, a loading time is shortened to carry out a high speed calculation.