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Circuit system for testing microprocessor has control register, multiplexers, feedback shift register, feedback multiple shift register, control unit feeding test commands, evaluating outputs
Circuit system for testing microprocessor has control register, multiplexers, feedback shift register, feedback multiple shift register, control unit feeding test commands, evaluating outputs
The circuit system has a test control register (22) for feeding test commands to the instruction decoder (14), and a first multiplexer for selecting either the test command from the register or the command from the polling unit (12). A linearly fed back shift register feeds test operands to the instruction performance unit (16), and a second multiplexer selects test operands from the shift register or main memory. A fed back multiple shift register receives results from the instruction performance unit. A control unit feeds test commands to the test control register and the linear feedback shift register and evaluates an output signature of the multiple shift register. An Independent claim is also included for a method of evaluating a processor.
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