VECTOR REGISTER RENAMING CONTROL SYSTEM, VECTOR PROCESSOR, AND VECTOR REGISTER RENAMING CONTROL METHOD

摘要

PROBLEM TO BE SOLVED: To optimize renaming of a vector register considering masked arithmetic operation.;SOLUTION: A vector register 210 includes: means for allocating two physical registers to one logical register at a maximum and storing a vector length of a final instruction written to the logical register; means for comparing a vector length of an instruction to be executed with the vector length of the final instruction written into the logical register; means for controlling the novel allocation of the physical register to a destination register and an arithmetic operation width in accordance with the comparison result of the vector length; means for generating dependence between the physical register and the logical register on a source register in accordance with the comparison result of the vector length; and means for generating dependence for performing data copy of a non-updated portion in the destination register in accordance with the comparison result of the vector length and whether the instruction to be executed indicates masked arithmetic operation.;COPYRIGHT: (C)2015,JPO&INPIT