CIRCUIT TO MINIMIZE LOCAL CLOCK FREQUENCY DISTURBANCES WHEN PHASE LOCKING TO A REFERENCE CLOCK CIRCUIT

摘要

TITLECIRCUIT TO MINIMIZE LOCAL CLOCK FREQUENCYDISTURBANCES WHEN PHASE LOCKING TO AREFERENCE CLOCK CIRCUITABSTRACT OF THE DISCLOSUREA frequency disturbance minimization circuitfor use in a phase locked loop circuit. A pulse gen-erator eliminates random phase shift, which occursafter a reference clock outage, by synchronizing counteddown derivatives of the local and reference clock cir-cuits. A window circuit provides a signal representa-tive of the difference in phase between these local andreference clock circuits. A counter accumulates thesephase difference window signals for periodic interroga-tion by a microprocessor which causes a voltage con-trolled oscillator to adjust its frequency in thedirection necessary to eliminate this phase difference.