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A drain forming process on an integrated circuit device and an integrated circuit device manufactured by the process

机译:集成电路器件上的漏极形成工艺以及通过该工艺制造的集成电路器件

摘要

A method of using removable sidewall spacers to minimize the need for mask levels in forming lightly doped drains (LDDS) in the formation of CMOS integrated circuits. Aluminum or chemical vapor deposition (CVD) metals such as tungsten are suitable materials to form removable sidewall spacers which exist around CMOS gates during heavily doped source/drain region implants. Conformal materials such as CVD polysilicon may also be employed for this purpose. The sidewall spacers are removed before implantation of the lightly doped drain regions around the gates. This implantation sequence is exactly the reverse of what is currently practiced for lightly doped drain formation.
机译:一种使用可移除侧壁间隔物以最小化在CMOS集成电路的形成中形成轻掺杂漏极(LDDS)时对掩模水平的需要的方法。铝或化学气相沉积(CVD)金属(例如钨)是形成可移除侧壁间隔物的合适材料,该侧壁间隔物在重掺杂源极/漏极区注入期间存在于CMOS栅极周围。保形材料例如CVD多晶硅也可以用于该目的。在围绕栅极注入轻掺杂漏极区之前,应去除侧壁隔离层。该注入顺序与当前轻掺杂漏极形成实践的相反。

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