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RETRIAL SYSTEM FOR TRANSFER INSTRUCTION IN DATA PROCESSOR

机译:数据处理器中传输指令的重试系统

摘要

PURPOSE:To improve the reliability of a data processing unit by starting the retrial of the firmware based on the 1st operand length, the 2nd address and the 2nd operand length when a specific condition is confirmed. CONSTITUTION:The 1st address, the 1st operand length, the 2nd address and the 2nd operand length are stored in registers 105, 110, 106 and 111 at the start of the move instruction. After the content in the main storage is rewritten by the execution of the present instruction, even if a hardware error takes place and the retrial is disabled, a flip-flop 126 represents the move instruction execution and when it is confirmed that the content of the 1st main storage operand is not rewritten by the execution of the move instruction of itself based on the said 4-set of information stored, the retrials of the firmware is started based on the said 4-set of information. Thus, the retrial rate of the move instruction of the entire data processing unit is improved considerably to improve the reliability of the data processing unit.
机译:目的:通过在确定特定条件时根据第一操作数长度,第二地址和第二操作数长度开始固件重试,以提高数据处理单元的可靠性。组成:第一地址,第一操作数长度,第二地址和第二操作数长度在移动指令开始时存储在寄存器105、110、106和111中。在通过本指令的执行来重写主存储器中的内容之后,即使发生硬件错误并且禁止重试,触发器126也表示移动指令的执行,并且当确认执行了指令的内容时。基于所存储的所述4组信息,通过执行自身的移动指令不会重写第一主存储操作数,而基于所述4组信息来开始固件的重试。因此,整个数据处理单元的移动指令的重试率大大提高,从而提高了数据处理单元的可靠性。

著录项

  • 公开/公告号JPS62282338A

    专利类型

  • 公开/公告日1987-12-08

    原文格式PDF

  • 申请/专利权人 NEC CORP;

    申请/专利号JP19860124711

  • 发明设计人 ITO MIKIO;

    申请日1986-05-31

  • 分类号G06F12/00;G06F9/30;G06F11/14;G06F12/02;

  • 国家 JP

  • 入库时间 2022-08-22 07:02:18

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