MIMD (multiple instruction multiple data) multiprocessor system for real-time image processing

摘要

Abstract: A novel MIMD (Multiple Instruction Multiple Data) based architecture consisting of multiple processing elements (PE) has been developed. This architecture is adapted to real-time processing of sequences of different tasks for local image segments. Each PE contains an arithmetic processing of sequences of different tasks for local image segments. Each PE contains an arithmetic processing unit (APU), adapted to parallel processing of low level operations, and a high level and control processor (HLCP) for medium and high level operations and control of the PE. This HLCP can be a standard signal processor or a RISC processor. Because of the local control of each PE by the HLCP and a SIMD structure of the APU, the overall system architecture is characterized as MIMD based with a local SIMD structure for low level processing. Due to an overlapped computation and communication and multiprocessor system achieves a linear speedup compared to a single processing element. Main parts of the PE have been realized as two ASICs in a 1.5 $mu@m CMOS-Process. With a system clock rate of 25 MHz, each PE provides a peak performance of 400 Mega operations per second (MOPS).!