Methods for forming closely spaced openings and for making contacts to semiconductor device surfaces

摘要

Methods for producing integrated circuit structures are described with reference to a small area lateral bipolar transistor comprising a semiconductor body (10) having surface regions thereof isolated from other such regions by a pattern of dielectric isolation.;At least two narrow width PN junction regions are located within at least one of the surface regions. Substantially vertical conformal conductive layers (62, 64) electrically contact each of the PN junction regions which serve as the emitter (56) and collector (58) regions for the bipolar transistor, A junction base region (74) of an opposite conductivity is located between and contiguous to the emitter and the collector junctions. Substantially horizontal conductive layers (22) are in electrical contact with an edge of each of the vertical conductive layers (62, 64) and separated from the surface regions by a first electrically insulating layer (20). A second insulating layer (70) covers the conformal conductive layers. The horizontal conductive layer is patterned so as to form conductive lines electrically separated from one another. A third insulating layer (24) is located over the patterned horizontal conductive layers. An ohmic contact (80, 84) is made to each of the horizontal conductive layers (22) through an opening in the third insulating layer (24) which effectively makes electrical contacts to the emitter (56) and collector (58) regions via the patterned horizontal conductive layers (22) and the vertical conductive layers (62, 64). Another contact (82) is made to the base region (74) which contact is separated from the vertical conductive layers (62, 64) by the second insulating layer (70).