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Integrated semiconductor circuit having load resistors arranged as thin-film bars in the field oxide regions separating the active transistor regions, and process for their manufacture

机译:集成半导体电路及其制造方法,该集成电路具有将负载电阻器以薄膜条的形式布置在分隔有源晶体管区域的场氧化区域中的方法

摘要

In a circuit containing integrated MOS transistors and/or bipolar transistors, the load resistors arranged as thin-film strips (14) on the field oxide regions (2) separating the active transistor regions consist of polycrystalline silicon (4) which is produced at the same time as the gate electrodes (24) and/or the emitter or base terminal regions of the bipolar transistors on the substrate (1) containing the integrated circuit. The load resistors (14) are structured by means of an oxide mask (5) which acts as an etching barrier in structuring the gate electrode which consists of a polysilicon (24) double layer and a refractory metal silicide (27). Since only the polysilicon (4) of the gate level (24) is used without the silicide (27) on top of it for the load resistors (14), the sheet resistance of the load resistors (14) can be adjusted independently of that of the gates (24, 27). The invention can be used for CMOS and bipolar CMOS circuits. …IMAGE…
机译:在包含集成MOS晶体管和/或双极晶体管的电路中,以薄膜条(14)形式布置在分隔有源晶体管区域的场氧化区域(2)上的负载电阻由多晶硅(4)组成,与包含集成电路的衬底(1)上的双极晶体管的栅电极(24)和/或发射极或基极端子区域同时进行。负载电阻器(14)由氧化物掩模(5)构成,该氧化物掩模在构造由多晶硅(24)双层和难熔金属硅化物(27)组成的栅电极时用作蚀刻阻挡层。由于仅将栅极级(24)的多晶硅(4)用于负载电阻器(14),而在其顶部没有硅化物(27),因此可以独立于负载电阻(14)调整薄膜电阻门(24,27)。本发明可以用于CMOS和双极CMOS电路。 …<图像>…

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