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Device for transforming the occurrence probability of logic vectors and for the generation of vector sequences with time variable probabilities
Device for transforming the occurrence probability of logic vectors and for the generation of vector sequences with time variable probabilities
To provide a random device for randomly testing logic circuits, particularly microprocessors, it is necessary to use a device for transforming the occurrence probability of logic vectors to produce vectors sequences having time-changing probabilities. Such a device comprises a memory or an equivalent circuit to which are applied input logic vectors (Ve1, Ve2 . . . Vn) having respective occurrence probabilities which are different or the same and containing, in the respective areas of different range, the different categories of output vectors (Vs1, Vs2 . . . Vsi). Thereby the occurrence probability of a predetermined output vector (Vs1, Vs2 . . . Vsi) depends both on the range of the memory area wherein said vector is stored, that is to say the number of elementary positions or eight-bit bytes which are included within said area, and on the respective probabilities (pr1, pr2 . . . prn) of the input vectors (Ve1, Ve2 . . . Ven) corresponding to the addresses of the elementary positions, m1, m2 . . . mn) of the area of the memory in question.
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