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Device for the transformation of the appearance probability of logic vectors and for the generation of time-variable probability vector sequences

机译:用于转换逻辑向量的出现概率以及用于生成时变概率向量序列的设备

摘要

a test device for random logic circuits, such as microprocessors.it is necessary to use a system of transformation of the probability of occurrence of vectors and vector sequences to produce probabilities vary over time.;such a device has a memory or an equivalent circuit which is applied to vectors (ve1, ve2 log entry.6) with respective probabilities of occurrence, and with different or equal in respective areas of different areas, different types of output vectors (vs1) - vs2.... vsl). in this way, the probability of occurrence of a given output vector (ftl) - vs2.vsi) depends on the extent of the area of memory in which the vector is stored, i.e., the number of basic headings or bytes that covers this area.and the respective probabilities (pr1, pr2. prn) vectors (ve1, ve2 in... the corresponding addresses of the basic (m1, m2... mn) of the storage area.
机译:用于随机逻辑电路(例如微处理器)的测试设备。有必要使用向量和向量序列出现概率的转换系统来产生随时间变化的概率。此类设备具有存储器或等效电路,应用于具有各自出现概率,并且在不同区域的各个区域中具有不同或相等的,不同类型的输出向量(vs1)-vs2 .... vsl的向量(ve1,ve2日志条目。6)。以这种方式,给定输出向量(ftl)-vs2.vsi)出现的可能性取决于存储向量的内存区域的范围,即覆盖该区域的基本标题或字节数以及各自的概率向量(pr1,pr2。prn)...(ve1,ve2 in ...存储区域的基本(m1,m2 ... mn)的对应地址。

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