HIDDEN PLANE AND HIDDEN LINE ERASING CIRCUIT FOR GRAPHIC DISPLAY

摘要

PURPOSE:To shorten the time required for hidden-plane or hidden-line processing by computing the drawing direction of an input picture element data sequence and detecting picture element data which are behind other picture elements and need not be displayed, and nullifying them. CONSTITUTION:When picture element data XA, YA, and ZA are inputted to a pipeline register 1a, picture element data XB, YB, and ZB which are shifted in phase are obtained at the output of the register 1a. A coincidence circuit 1b checks whether X addresses XA and XB are equal or not and a coincidence circuit 1c checks whether Y addresses YA and YB are equal or not, and further a comparing circuit 1d check on a drawing direction to a Z axis, thereby checking the generation directions of those picture elements. Those three arithme tic results are inputted to an AND operation means 1e, whose output is true only when ZBZA and the three inputs are all true. The output of the means 1e is supplied as a write enable signal to an input register 3a and when an arithmetic result is true, writing is disabled. Then, it is decided on the basis of the signal 16 whether data is written in a register 3a or not. Consequently, the drawing speed is improved.