Full adder and operation circuit including a plurality of full adders

摘要

The invention provides a full adder having a logic circuit (1) which has an inverter (11) and a selector circuit (12), a logic circuit (2) which has an inverter (13) and a selector circuit (14), and a logic circuit (3) which has a selector circuit (15) and an inverter (16) so as to produce a sum output signal S and a carry output signal C in response to three input signals X, Y and Z.