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Method of manufacturing VLSI logic circuits in polysilicium gate NMOS fashion with an integrated EEPROM memory for tunnel current programming
Method of manufacturing VLSI logic circuits in polysilicium gate NMOS fashion with an integrated EEPROM memory for tunnel current programming
The invention relates to a method of manufacturing VLSI logic circuits in polysilicon-gate NMOS technology together with integrated EEPROM memories for tunnel current programming, the required field implantation being divided into two substeps and, after a nitride/oxide sandwich insulation (7, 8) has been produced, an oxidation being carried out in moist atmosphere at 850 DEG C to oxidise spacers (10) at the edges of the nitride layer. IMAGE
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