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Process for fabrication, by means of epitaxial recrystallization, of insulated-gate field-effect transistors with junctions of minimum depth

机译:通过外延再结晶制造结深度最小的绝缘栅场效应晶体管的方法

摘要

A process for fabrication, by epitaxial recrystallization, of insulated-gate field-effect transistors with junctions of minimum depth, includes the formation of a layer of polycrystalline silicon on a substrate of monocrystalline silicon in predetermined areas to form source and drain regions of an insulated-gate field-effect transistor, aligned with a gate electrode of this transistor. Doping impurities are then introduced in the layer by ion implantation, using an implantation energy sufficient to render the entire layer of polycrystalline silicon amorphous and so as to pass the polycrystalline to monocrystalline interface. Finally, epitaxial recrystallization of the silicon rendered amorphous, starting from the substrate itself, in predetermined areas, is effected by a low-temperature heat treatment.
机译:通过外延再结晶制造具有最小深度结的绝缘栅场效应晶体管的方法包括在预定区域的单晶硅衬底上形成一层多晶硅,以形成绝缘的源极和漏极区。栅场效应晶体管,与该晶体管的栅电极对准。然后使用足以使整个多晶硅层变为非晶态并通过多晶至单晶界面的注入能量,通过离子注入将掺杂杂质引入层中。最后,通过低温热处理从衬底本身开始在预定区域内使变成非晶态的硅外延重结晶。

著录项

  • 公开/公告号US4789644A

    专利类型

  • 公开/公告日1988-12-06

    原文格式PDF

  • 申请/专利权人 SGS MICROELETTRONICA SPA;

    申请/专利号US19860946187

  • 发明设计人 LAURA MEDA;

    申请日1986-12-22

  • 分类号H01L21/36;

  • 国家 US

  • 入库时间 2022-08-22 06:28:48

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