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Embedded isolation region and process for forming the same on silicon substrate

机译:嵌入式隔离区及其在硅衬底上形成隔离区的工艺

摘要

An embedded isolation region and a process for forming the same on the substrate made of silicon. The isolation region(s) is constituted of a silicon nitride region, a silicon oxide region and, if required, a channel stop region in this order in the upper surface of the substrate to the deep inside of the substrate. The isolation region(s) is formed by an ion implantation technique using a mask made of an oxide film, followed by oxidation and removal of at least an upper substrate region on the upper side of the silicon nitride region. As compared with the formation of a conventional trench type region(s), even isolation regions with different sizes or an isolation region having portions with different sizes can be formed without a fear of entailing an uneven surface, and the development of crystal defects can be mitigated without an increase in the number of steps, while, even in a trench filled with poly-Si, at the same time some adverse effect of the remaining poly-Si on element regions can be avoided.
机译:嵌入式隔离区及其在由硅制成的基板上形成隔离区的工艺。隔离区域由氮化硅区域,氧化硅区域以及如果需要的话在衬底的上表面至衬底的深内部的顺序的沟道停止区域构成。通过使用由氧化膜制成的掩模的离子注入技术形成隔离区域,然后氧化并去除氮化硅区域的上侧上的至少上基板区域。与常规沟槽型区域的形成相比,即使形成具有不同尺寸的隔离区域或具有具有不同尺寸的部分的隔离区域,也不必担心会导致不平坦的表面,并且可以形成晶体缺陷。在不增加步骤数的情况下减轻了应力,同时即使在填充有多晶硅的沟槽中,同时也可以避免残留的多晶硅对元件区域的某些不利影响。

著录项

  • 公开/公告号US4968636A

    专利类型

  • 公开/公告日1990-11-06

    原文格式PDF

  • 申请/专利权人 OKI ELECTRIC INDUSTRY CO. LTD.;

    申请/专利号US19890407449

  • 发明设计人 FUMIO SUGAWARA;

    申请日1989-09-14

  • 分类号H01L21/76;

  • 国家 US

  • 入库时间 2022-08-22 06:06:46

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