MIXED TECHNOLOGY INTEGRATED DEVICE WHICH IS MADE UP BY COMPRISING COMPLEMENTARY LD MOS POWER TRANSISTOR, CMOS AND VERTICAL PNP INTEGRATED STRUCTURE HAVING SUPERIOR CAPACITY TO STAND RELATIVELY HIGH SUPPLY VOLTAGE

摘要

PURPOSE: To withstand a high working voltage by providing a P-doped n-type Si region having a diffusion profile expanding from the surface of an n-type epitaxial layer. CONSTITUTION: Phosphorus-doped n-type region 8 are disposed in the drain area of an n-channel LDMOS transistor expanding between a gate electrode 12 and separation field oxide 5, in the source area of a p-channel LDMOS transistor expanding between the gate electrode 12 and separation field oxide 5 and in the drain area of an n-channel MOS transistor expanding between the gate electrode 12 and separation field oxide 5. At least n+ drain diffused parts 10, p+ source junctions 9, n+ body contact regions 10, and n+ emitter junctions 10 are included and expanded by their depths from the surface of an epitaxial layer 2 in the emitter area of pnp bipolar transistors with collectors limited by the peripheral separation field oxide 5.