PURPOSE:To improve the error correction capability by providing a forward replica exclusive OR circuit (EX-OR) between 2-way flip-flops(FFs), providing a replica memory, storing a backward replica into the replica memory and reading the replica. CONSTITUTION:A replica memory 5 is provided and a forward replica generating circuit of an internal code section 3 is constituted by providing a forward replica EX-OR between 2-way FFs. When a forward replica is generated, a backward replica is generated and stored in the replica memory 5 and the backward replica stored in the replica memory 5 is read and given to a path retrieval section 2 via the internal code section 3. Thus, even when a generation matrix at the sender side is prolonged to improve the error correction capability, the internal processing time is quickened to increase the error correction capability.
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