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halbleitervorrichtung with trace, the good kantenbekleidung to kontaktloechern possesses.

机译:具有痕迹的半导体器件,对kontaktloechern来说是好的服装。

摘要

Step coverage of wiring layer (ll) of semiconductor device especially at the contact holes (5, 6) is improved. Inside of the contact holes (5, 6) is covered by polysilicon layer (7, 8, 9) deposited by chemical vapor deposition (CVD); and selectively doped with impurities having same conductivity type of the contact region (2, 3) to which the polysilicon layer (7, 8, 9) is contacted at the bottom of the contact holes (5, 6). The remaining parts of the contact holes (5, 6) are buried with SiO2, and the wiring layer (ll) is formed on it. Since the step coverage of the material deposited by CVD is very good, the disconnection at the side walls of the contact holes (5, 6) is avoided. The short circuits caused by growth of spikes of eutectic of silicon and aluminium is also avoided. If the surface of the polysilicon layer (7, 8, 9) is covered by a thin film (2l) of SiO2 or Si3N4, the material to bury the contact hole (5, 6) may be replaced by other material polysilicon or amorphous silicon for instance. Further a barrier layer (23) is provided between the wiring layer (ll) and the polysilicon layer (7, 8, 9). This prevents the migration of aluminium over the polysilicon, so the reliability of the wiring is further improved. The barrier layer (23) is made from silicide of high melting point metal or the metal itself. This improves the conduction between the contact region and the wiring layer.
机译:尤其是在接触孔(5、6)处,改善了半导体器件的布线层(11)的台阶覆盖。接触孔(5、6)的内部被通过化学气相沉积(CVD)沉积的多晶硅层(7、8、9)覆盖;并在接触孔(5、6)的底部选择性地掺杂具有与多晶硅层(7、8、9)接触的接触区域(2、3)相同的导电类型的杂质。接触孔(5、6)的其余部分用SiO 2掩埋,并在其上形成布线层(11)。由于通过CVD沉积的材料的阶梯覆盖非常好,因此避免了在接触孔(5、6)的侧壁处的断开。还避免了由硅和铝的共晶尖峰的增长引起的短路。如果多晶硅层(7、8、9)的表面被SiO2或Si3N4的薄膜(2l)覆盖,则掩埋接触孔(5、6)的材料可以用其他材料多晶硅或非晶硅代替例如。在布线层(11)和多晶硅层(7、8、9)之间还设有阻挡层(23)。这防止了铝在多晶硅上的迁移,因此进一步提高了布线的可靠性。阻挡层(23)由高熔点金属或金属本身的硅化物制成。这改善了接触区域和布线层之间的导电性。

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