Processor system with processor and memory control unit - has identification memories associated with memory modules, facilitates changing module capacities

摘要

A processor system has a control unit (AE) for a memory consisting of partial memories (MO1-MO3) which delivers a ready status signal to the processor for a reading process when data are ready for access by and for a writing process when writing is complete. Each partial memory is associated with an identification memory (KO1-KO3) in which are placed identification data. The identification data are read by the control unit which forms a composite memory address region for the processor and generates a ready status signal for the partial memory. USE/ADVANTAGE - System design facilitates changing memory module capacities.