A switched-capacitor sigma-delta modulator includes at least one memory element, at least one comparator connected to the at least one memory element, and at least one integrator connected to the at least one comparator. The at least one integrator has a first input stage including a series circuit of a first switch, a first capacitor with two terminals and a second switch, a third switch for connecting one of the two terminals of the first capacitor to ground potential, and a fourth switch for connecting the other of the two terminals of the first capacitor to ground potential. The at least one integrator also has a second input stage connected parallel ot the first input stage including a series circuit of a fifth switch, a second capacitor having two terminals and a sixth switch, a seventh switch for connecting one of the two terminals of the second capacitor to ground potential, and an eighth switch for connecting the other of the two terminals of the second capacitor to ground potential. Only one integrator with high amplication which is disposed in an outer feedback loop of the sigma-delta modulator, may have the second input stage. The first and second capacitors and the switches of the first and second input stages may be substantially identically set up and the switches have various switching phases.
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