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three are complementary mos ic.

机译:三个是互补性的。

摘要

In a three-state complementary MOS integrated circuit having an output circuit comprising a P-channel MOS transistor and an N-channel MOS transistor, part of a pre-output stage circuit between the gate inputs of the P-channel MOS transistor and the N-channel MOS transistor of the output circuit comprises a parallel circuit of a first series circuit and a second series circuit, each of the first series circuits comprising a P-channel MOS transistor to which the control signal is applied and an N-channel MOS transistor to which the in inverted control signal is applied. When the control signal and the inverted control signal are at the same potential, either the P-channel MOS transistors or the N-channel MOS transistors of the parallel circuit are off. Accordingly totempole current through the pre-output stage circuit is avoided.
机译:在具有输出电路(包括P沟道MOS晶体管和N沟道MOS晶体管)的三态互补MOS集成电路中,在P沟道MOS晶体管的栅极输入和N之间的预输出级电路的一部分输出电路的N沟道MOS晶体管包括第一串联电路和第二串联电路的并联电路,每个第一串联电路包括施加有控制信号的P沟道MOS晶体管和N沟道MOS晶体管。向其施加反向控制信号。当控制信号和反相控制信号处于相同电势时,并联电路的P沟道MOS晶体管或N沟道MOS晶体管均截止。因此,避免了流过预输出级电路的电流。

著录项

  • 公开/公告号NL188672C

    专利类型

  • 公开/公告日1992-08-17

    原文格式PDF

  • 申请/专利号NL19870002720

  • 发明设计人

    申请日1987-11-13

  • 分类号H03K17/687;

  • 国家 NL

  • 入库时间 2022-08-22 05:34:59

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