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Electrically programmable and erasable MOS floating gate memory device employing tunneling and method of fabricating same
Electrically programmable and erasable MOS floating gate memory device employing tunneling and method of fabricating same
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机译:采用隧穿的电可编程可擦除MOS浮栅存储器件及其制造方法
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摘要
An electrically programmable and electrically erasable MOS memory device suitable for high density integrated circuit memories is disclosed. Carriers are tunneled between a floating conductive gate and a doped region in the substrate to program and erase the device. A minimum area of thin oxide (70 A-200 A) is used to separate this doped region from the floating gate. In one embodiment, a second layer of polysilicon is used to protect the thin oxide region during certain processing steps.
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