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Nonvolatile semiconductor memory device with reduced variation in source potential of floating gate type memory transistors and operating method therefor
Nonvolatile semiconductor memory device with reduced variation in source potential of floating gate type memory transistors and operating method therefor
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机译:浮栅型存储晶体管的源极电势变化减小的非易失性半导体存储器件及其操作方法
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摘要
In a nonvolatile semiconductor device in which source metal interconnections for coupling to ground a source of a floating gate type memory transistor are commonly provided for each predetermined plurality of memory transistors, switching transistors are provided for each column for coupling to ground columns excluding the selected column when a single column is selected in response to an external column address. Each of the switching transistors operates in response to an inverted signal of an output of a column decoder. According to this structure, a variation in source potential of each memory transistor caused by the difference in source resistance associated with each of the memory transistors is reduced.
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